// Copyright (C) 1953-2022 NUDT
// Verilog module name - hardware_control_point
// Version: V3.4.0.20220228
// Created:
//         by - fenglin
////////////////////////////////////////////////////////////////////////////
// Description:
//         hardware control point
///////////////////////////////////////////////////////////////////////////
`timescale 1ns/1ps

module hardware_control_point
#(
parameter PTP_RX_OFFSET_XGMII = 16'd131,
parameter PTP_TX_OFFSET_XGMII = 16'd58, 
parameter PTP_RX_OFFSET_GMII = 16'd192,
parameter PTP_TX_OFFSET_GMII = 16'd72,
parameter clk_period = {8'd8,41'h0}//8ns
)
(
        i_clk,
        i_rst_n, 

        i_tsnnic_or_tsnswitch ,//1:tsnnic.  0:tsnswitch        
        ov_localclk        , 
        //o_local_cnt_rst   ,        
        //o_tsn_or_tte      ,
        o_sync_step_mode  ,
		ov_local_counter,
        
	    i_data_wr_from_tss ,
	    iv_data_from_tss   ,  
	    ov_data_to_tss     ,
	    o_data_wr_to_tss   ,
        
        i_gmii_rx_clk ,
        i_gmii_rx_dv  , 
        iv_gmii_rxd   ,
        i_gmii_rx_er  ,
        o_gmii_tx_clk ,
        o_gmii_tx_en  ,
        ov_gmii_txd   ,
        o_gmii_tx_er  ,

        ov_local_id                      , 
        iv_tss_ver                       , 
        o_rc_rxenable                    ,
        o_st_rxenable                    ,
        
        i_tsmp_lookup_table_key_wr       ,
        iv_tsmp_lookup_table_key         ,
        ov_tsmp_lookup_table_outport     ,
        o_tsmp_lookup_table_outport_wr   ,
        
		ov_cycle_length         ,
		o_cyclestart            ,
        o_sync_ok           ,

        ov_command_tss             ,
        o_command_wr_tss           ,        
        iv_command_ack_tss         ,
        i_command_ack_wr_tss       ,
        
		i_osm_req_tx_pulse_p0     ,     
		i_osm_resp_rx_pulse_p0    ,     
		i_osm_req_tx_pulse_p1     ,     
		i_osm_resp_rx_pulse_p1    ,     
		i_osm_req_tx_pulse_p2     ,     
		i_osm_resp_rx_pulse_p2    ,     
		i_osm_req_tx_pulse_p3     ,     
		i_osm_resp_rx_pulse_p3    ,     
		i_osm_req_tx_pulse_p4     ,     
		i_osm_resp_rx_pulse_p4    ,     
		i_osm_req_tx_pulse_p5     ,     
		i_osm_resp_rx_pulse_p5    ,     
		i_osm_req_tx_pulse_p6     ,     
		i_osm_resp_rx_pulse_p6    ,     
		i_osm_req_tx_pulse_p7     ,     
		i_osm_resp_rx_pulse_p7    ,     
		i_osm_req_tx_pulse_p8     ,     
		i_osm_resp_rx_pulse_p8    ,     
		i_osm_req_tx_pulse_p9     ,     
		i_osm_resp_rx_pulse_p9    ,     
		i_osm_req_tx_pulse_p10    ,     
		i_osm_resp_rx_pulse_p10   ,     
		i_osm_req_tx_pulse_p11    ,     
		i_osm_resp_rx_pulse_p11   ,     
		i_osm_req_tx_pulse_p12    ,     
		i_osm_resp_rx_pulse_p12   ,     
		i_osm_req_tx_pulse_p13    ,     
		i_osm_resp_rx_pulse_p13   ,     
		i_osm_req_tx_pulse_p14    ,     
		i_osm_resp_rx_pulse_p14   ,     
		i_osm_req_tx_pulse_p15    ,     
		i_osm_resp_rx_pulse_p15   ,     
		i_osm_req_tx_pulse_p16    ,     
		i_osm_resp_rx_pulse_p16   ,     
		i_osm_req_tx_pulse_p17    ,     
		i_osm_resp_rx_pulse_p17   ,     
		i_osm_req_tx_pulse_p18    ,     
		i_osm_resp_rx_pulse_p18   ,     
		i_osm_req_tx_pulse_p19    ,     
		i_osm_resp_rx_pulse_p19   ,     
		i_osm_req_tx_pulse_p20    ,     
		i_osm_resp_rx_pulse_p20   ,     
		i_osm_req_tx_pulse_p21    ,     
		i_osm_resp_rx_pulse_p21   ,     
		i_osm_req_tx_pulse_p22    ,     
		i_osm_resp_rx_pulse_p22   ,     
		i_osm_req_tx_pulse_p23    ,     
		i_osm_resp_rx_pulse_p23   ,     
		i_osm_req_tx_pulse_p24    ,     
		i_osm_resp_rx_pulse_p24   ,     
		i_osm_req_tx_pulse_p25    ,     
		i_osm_resp_rx_pulse_p25   ,     
		i_osm_req_tx_pulse_p26    ,     
		i_osm_resp_rx_pulse_p26   ,     
		i_osm_req_tx_pulse_p27    ,     
		i_osm_resp_rx_pulse_p27   ,     
		i_osm_req_tx_pulse_p28    ,     
		i_osm_resp_rx_pulse_p28   ,     
		i_osm_req_tx_pulse_p29    ,     
		i_osm_resp_rx_pulse_p29   ,     
		i_osm_req_tx_pulse_p30    ,     
		i_osm_resp_rx_pulse_p30   ,     
		i_osm_req_tx_pulse_p31    ,     
		i_osm_resp_rx_pulse_p31   , 

        i_osm_req_rx_pulse_p0     ,
		i_osm_resp_tx_pulse_p0    ,
		i_osm_req_rx_pulse_p1     ,
		i_osm_resp_tx_pulse_p1    ,
		i_osm_req_rx_pulse_p2     ,
		i_osm_resp_tx_pulse_p2    ,
		i_osm_req_rx_pulse_p3     ,
		i_osm_resp_tx_pulse_p3    ,
		i_osm_req_rx_pulse_p4     ,
		i_osm_resp_tx_pulse_p4    ,
		i_osm_req_rx_pulse_p5     ,
		i_osm_resp_tx_pulse_p5    ,
		i_osm_req_rx_pulse_p6     ,
		i_osm_resp_tx_pulse_p6    ,
		i_osm_req_rx_pulse_p7     ,
		i_osm_resp_tx_pulse_p7    ,
		i_osm_req_rx_pulse_p8     ,
		i_osm_resp_tx_pulse_p8    ,
		i_osm_req_rx_pulse_p9     ,
		i_osm_resp_tx_pulse_p9    ,
		i_osm_req_rx_pulse_p10    ,
		i_osm_resp_tx_pulse_p10   ,
		i_osm_req_rx_pulse_p11    ,
		i_osm_resp_tx_pulse_p11   ,
		i_osm_req_rx_pulse_p12    ,
		i_osm_resp_tx_pulse_p12   ,
		i_osm_req_rx_pulse_p13    ,
		i_osm_resp_tx_pulse_p13   ,
		i_osm_req_rx_pulse_p14    ,
		i_osm_resp_tx_pulse_p14   ,
		i_osm_req_rx_pulse_p15    ,
		i_osm_resp_tx_pulse_p15   ,
		i_osm_req_rx_pulse_p16    ,
		i_osm_resp_tx_pulse_p16   ,
		i_osm_req_rx_pulse_p17    ,
		i_osm_resp_tx_pulse_p17   ,
		i_osm_req_rx_pulse_p18    ,
		i_osm_resp_tx_pulse_p18   ,
		i_osm_req_rx_pulse_p19    ,
		i_osm_resp_tx_pulse_p19   ,
		i_osm_req_rx_pulse_p20    ,
		i_osm_resp_tx_pulse_p20   ,
		i_osm_req_rx_pulse_p21    ,
		i_osm_resp_tx_pulse_p21   ,
		i_osm_req_rx_pulse_p22    ,
		i_osm_resp_tx_pulse_p22   ,
		i_osm_req_rx_pulse_p23    ,
		i_osm_resp_tx_pulse_p23   ,
		i_osm_req_rx_pulse_p24    ,
		i_osm_resp_tx_pulse_p24   ,
		i_osm_req_rx_pulse_p25    ,
		i_osm_resp_tx_pulse_p25   ,
		i_osm_req_rx_pulse_p26    ,
		i_osm_resp_tx_pulse_p26   ,
		i_osm_req_rx_pulse_p27    ,
		i_osm_resp_tx_pulse_p27   ,
		i_osm_req_rx_pulse_p28    ,
		i_osm_resp_tx_pulse_p28   ,
		i_osm_req_rx_pulse_p29    ,
		i_osm_resp_tx_pulse_p29   ,
		i_osm_req_rx_pulse_p30    ,
		i_osm_resp_tx_pulse_p30   ,
		i_osm_req_rx_pulse_p31    ,
		i_osm_resp_tx_pulse_p31   ,

        o_sync_generate_pulse        
);
// I/O
// clk & rst
input               i_clk;
input               i_rst_n; 

input               i_tsnnic_or_tsnswitch ;

output  [79:0]      ov_localclk        ;
//output              o_local_cnt_rst   ;     
//output              o_tsn_or_tte     ;
output  [39:0]		ov_local_counter;
output              o_sync_step_mode ;

output  [63:0]	    ov_command_tss             ;
output  	        o_command_wr_tss           ;
input   [63:0]	    iv_command_ack_tss         ;
input    	        i_command_ack_wr_tss       ;

(*MARK_DEBUG="true"*)input	 [8:0]	    iv_data_from_tss  ;
(*MARK_DEBUG="true"*)input	  		    i_data_wr_from_tss;

input                   i_gmii_rx_clk     ;
input                   i_gmii_rx_dv      ; 
input   [8:0]           iv_gmii_rxd       ; 
input                   i_gmii_rx_er      ; 
output                  o_gmii_tx_clk     ;
output                  o_gmii_tx_en      ;
output  [8:0]           ov_gmii_txd       ;
output                  o_gmii_tx_er      ;

(*MARK_DEBUG="true"*)output [8:0] 	  	ov_data_to_tss    ;
(*MARK_DEBUG="true"*)output      		o_data_wr_to_tss  ;

output  [11:0]      ov_local_id                      ; 
input   [31:0]      iv_tss_ver                       ;
output              o_rc_rxenable                    ;
output              o_st_rxenable                    ;
(*MARK_DEBUG="true"*)input               i_tsmp_lookup_table_key_wr       ;
(*MARK_DEBUG="true"*)input   [47:0]      iv_tsmp_lookup_table_key         ;
(*MARK_DEBUG="true"*)output  [32:0]      ov_tsmp_lookup_table_outport     ;
(*MARK_DEBUG="true"*)output              o_tsmp_lookup_table_outport_wr   ;

output    [31:0]      ov_cycle_length ; 
(*MARK_DEBUG="true"*)output              o_cyclestart     ;           // 1024 ms / 1.024ms pluse
(*MARK_DEBUG="true"*)output              o_sync_ok         ;

input                  i_osm_req_tx_pulse_p0   ;
input                  i_osm_resp_rx_pulse_p0  ;
input                  i_osm_req_tx_pulse_p1   ;
input                  i_osm_resp_rx_pulse_p1  ;
input                  i_osm_req_tx_pulse_p2   ;
input                  i_osm_resp_rx_pulse_p2  ;
input                  i_osm_req_tx_pulse_p3   ;
input                  i_osm_resp_rx_pulse_p3  ;
input                  i_osm_req_tx_pulse_p4   ;
input                  i_osm_resp_rx_pulse_p4  ;
input                  i_osm_req_tx_pulse_p5   ;
input                  i_osm_resp_rx_pulse_p5  ;
input                  i_osm_req_tx_pulse_p6   ;
input                  i_osm_resp_rx_pulse_p6  ;
input                  i_osm_req_tx_pulse_p7   ;
input                  i_osm_resp_rx_pulse_p7  ;
input                  i_osm_req_tx_pulse_p8   ;
input                  i_osm_resp_rx_pulse_p8  ;
input                  i_osm_req_tx_pulse_p9   ;
input                  i_osm_resp_rx_pulse_p9  ;
input                  i_osm_req_tx_pulse_p10  ;
input                  i_osm_resp_rx_pulse_p10 ;
input                  i_osm_req_tx_pulse_p11  ;
input                  i_osm_resp_rx_pulse_p11 ;
input                  i_osm_req_tx_pulse_p12  ;
input                  i_osm_resp_rx_pulse_p12 ;
input                  i_osm_req_tx_pulse_p13  ;
input                  i_osm_resp_rx_pulse_p13 ;
input                  i_osm_req_tx_pulse_p14  ;
input                  i_osm_resp_rx_pulse_p14 ;
input                  i_osm_req_tx_pulse_p15  ;
input                  i_osm_resp_rx_pulse_p15 ;
input                  i_osm_req_tx_pulse_p16  ;
input                  i_osm_resp_rx_pulse_p16 ;
input                  i_osm_req_tx_pulse_p17  ;
input                  i_osm_resp_rx_pulse_p17 ;
input                  i_osm_req_tx_pulse_p18  ;
input                  i_osm_resp_rx_pulse_p18 ;
input                  i_osm_req_tx_pulse_p19  ;
input                  i_osm_resp_rx_pulse_p19 ;
input                  i_osm_req_tx_pulse_p20  ;
input                  i_osm_resp_rx_pulse_p20 ;
input                  i_osm_req_tx_pulse_p21  ;
input                  i_osm_resp_rx_pulse_p21 ;
input                  i_osm_req_tx_pulse_p22  ;
input                  i_osm_resp_rx_pulse_p22 ;
input                  i_osm_req_tx_pulse_p23  ;
input                  i_osm_resp_rx_pulse_p23 ;
input                  i_osm_req_tx_pulse_p24  ;
input                  i_osm_resp_rx_pulse_p24 ;
input                  i_osm_req_tx_pulse_p25  ;
input                  i_osm_resp_rx_pulse_p25 ;
input                  i_osm_req_tx_pulse_p26  ;
input                  i_osm_resp_rx_pulse_p26 ;
input                  i_osm_req_tx_pulse_p27  ;
input                  i_osm_resp_rx_pulse_p27 ;
input                  i_osm_req_tx_pulse_p28  ;
input                  i_osm_resp_rx_pulse_p28 ;
input                  i_osm_req_tx_pulse_p29  ;
input                  i_osm_resp_rx_pulse_p29 ;
input                  i_osm_req_tx_pulse_p30  ;
input                  i_osm_resp_rx_pulse_p30 ;
input                  i_osm_req_tx_pulse_p31  ;
input                  i_osm_resp_rx_pulse_p31 ;

input                  i_osm_req_rx_pulse_p0   ;
input                  i_osm_resp_tx_pulse_p0  ;
input                  i_osm_req_rx_pulse_p1   ;
input                  i_osm_resp_tx_pulse_p1  ;
input                  i_osm_req_rx_pulse_p2   ;
input                  i_osm_resp_tx_pulse_p2  ;
input                  i_osm_req_rx_pulse_p3   ;
input                  i_osm_resp_tx_pulse_p3  ;
input                  i_osm_req_rx_pulse_p4   ;
input                  i_osm_resp_tx_pulse_p4  ;
input                  i_osm_req_rx_pulse_p5   ;
input                  i_osm_resp_tx_pulse_p5  ;
input                  i_osm_req_rx_pulse_p6   ;
input                  i_osm_resp_tx_pulse_p6  ;
input                  i_osm_req_rx_pulse_p7   ;
input                  i_osm_resp_tx_pulse_p7  ;
input                  i_osm_req_rx_pulse_p8   ;
input                  i_osm_resp_tx_pulse_p8  ;
input                  i_osm_req_rx_pulse_p9   ;
input                  i_osm_resp_tx_pulse_p9  ;
input                  i_osm_req_rx_pulse_p10  ;
input                  i_osm_resp_tx_pulse_p10 ;
input                  i_osm_req_rx_pulse_p11  ;
input                  i_osm_resp_tx_pulse_p11 ;
input                  i_osm_req_rx_pulse_p12  ;
input                  i_osm_resp_tx_pulse_p12 ;
input                  i_osm_req_rx_pulse_p13  ;
input                  i_osm_resp_tx_pulse_p13 ;
input                  i_osm_req_rx_pulse_p14  ;
input                  i_osm_resp_tx_pulse_p14 ;
input                  i_osm_req_rx_pulse_p15  ;
input                  i_osm_resp_tx_pulse_p15 ;
input                  i_osm_req_rx_pulse_p16  ;
input                  i_osm_resp_tx_pulse_p16 ;
input                  i_osm_req_rx_pulse_p17  ;
input                  i_osm_resp_tx_pulse_p17 ;
input                  i_osm_req_rx_pulse_p18  ;
input                  i_osm_resp_tx_pulse_p18 ;
input                  i_osm_req_rx_pulse_p19  ;
input                  i_osm_resp_tx_pulse_p19 ;
input                  i_osm_req_rx_pulse_p20  ;
input                  i_osm_resp_tx_pulse_p20 ;
input                  i_osm_req_rx_pulse_p21  ;
input                  i_osm_resp_tx_pulse_p21 ;
input                  i_osm_req_rx_pulse_p22  ;
input                  i_osm_resp_tx_pulse_p22 ;
input                  i_osm_req_rx_pulse_p23  ;
input                  i_osm_resp_tx_pulse_p23 ;
input                  i_osm_req_rx_pulse_p24  ;
input                  i_osm_resp_tx_pulse_p24 ;
input                  i_osm_req_rx_pulse_p25  ;
input                  i_osm_resp_tx_pulse_p25 ;
input                  i_osm_req_rx_pulse_p26  ;
input                  i_osm_resp_tx_pulse_p26 ;
input                  i_osm_req_rx_pulse_p27  ;
input                  i_osm_resp_tx_pulse_p27 ;
input                  i_osm_req_rx_pulse_p28  ;
input                  i_osm_resp_tx_pulse_p28 ;
input                  i_osm_req_rx_pulse_p29  ;
input                  i_osm_resp_tx_pulse_p29 ;
input                  i_osm_req_rx_pulse_p30  ;
input                  i_osm_resp_tx_pulse_p30 ;
input                  i_osm_req_rx_pulse_p31  ;
input                  i_osm_resp_tx_pulse_p31 ;

output                 o_sync_generate_pulse;

wire    [8:0] 	  	wv_data_lmp2css        ;
wire        		w_data_wr_lmp2css      ;
wire    [8:0] 	  	wv_data_css2ta        ;
wire        		w_data_wr_css2ta      ;
                                          
wire    [8:0] 	  	wv_data_tsc2css       ;
wire        		w_data_wr_tsc2css     ;
wire    [8:0] 	  	wv_data_css2osc       ;
wire        		w_data_wr_css2osc     ;

wire    [8:0] 	  	wv_data_rep_tsc2css   ;
wire        		w_data_wr_rep_tsc2css ;

wire    [8:0] 	  	wv_data_ton2tcss      ;
wire        		w_data_wr_ton2tcss    ;

wire                w_wr_lmp2osc           ;
wire    [31:0]      wv_wdata_lmp2osc       ;
wire    [18:0]      wv_addr_lmp2osc        ;
wire                w_rd_lmp2osc           ;
wire                w_wr_tsc2ta           ;
wire    [18:0]      wv_raddr_tsc2ta       ;
wire    [31:0]      wv_rdata_tsc2ta       ;

wire                w_wr_lmp2cc            ;
wire    [31:0]      wv_wdata_lmp2cc        ;
wire    [18:0]      wv_addr_lmp2cc         ;
wire                w_rd_lmp2cc            ;
wire                w_wr_cc2ta            ;
wire    [18:0]      wv_raddr_cc2ta        ;
wire    [31:0]      wv_rdata_cc2ta        ;

wire                w_wr_lmp2ton            ;
wire    [31:0]      wv_wdata_lmp2ton        ;
wire    [18:0]      wv_addr_lmp2ton         ;
wire                w_rd_lmp2ton            ;
wire                w_wr_ton2ta             ;
wire    [18:0]      wv_raddr_ton2ta         ;
wire    [31:0]      wv_rdata_ton2ta         ;

wire    [31:0]      wv_master_port_tsc2lmp     ;
wire    [31:0]      wv_port_ptp_enabled_tsc2lmp;

wire    [8:0]       wv_data_rep2pdi       ;
wire                w_data_wr_rep2pdi     ;

wire    [65:0]      wv_command_hcp2hub        ;   
wire                w_command_wr_hcp2hub      ; 
wire    [65:0]      wv_command_ack_hub2hcp    ;
wire                w_command_ack_wr_hub2hcp  ; 
control_stream_switching control_stream_switching_inst
(
        .i_clk             (i_clk      ),   
        .i_rst_n           (i_rst_n    ),
        
        .i_local_or_remote_ctrl(1'b1),//1'b0:local;  1'b1:remote
      
        .iv_data_lmp        (wv_data_lmp2css  ),
        .i_data_wr_lmp      (w_data_wr_lmp2css),    
        .ov_data_lmp        (wv_data_css2ta  ),        
        .o_data_wr_lmp      (w_data_wr_css2ta), 
      
        .iv_data_tsc       (wv_data_tsc2css   ),
        .i_data_wr_tsc     (w_data_wr_tsc2css ),    
        .ov_data_tsc       (wv_data_css2osc   ),        
        .o_data_wr_tsc     (w_data_wr_css2osc ),
       
        .iv_data_tse       (iv_data_from_tss  ),
        .i_data_wr_tse     (i_data_wr_from_tss),    
        .ov_data_tse       (ov_data_to_tss    ),        
        .o_data_wr_tse     (o_data_wr_to_tss  ),          
    
        .iv_data_ton       (wv_data_ton2tcss       ),
        .i_data_wr_ton     (w_data_wr_ton2tcss     ),
      
        .iv_data_rep       (wv_data_rep_tsc2css  ),
        .i_data_wr_rep     (w_data_wr_rep_tsc2css)        
);

local_management_proxy local_management_proxy_inst
(
.i_clk                          (i_clk              ),
.i_rst_n                        (i_rst_n            ),
                                                    
.i_sync_ok                      (o_sync_ok           ),

.i_gmii_rx_clk                  (i_gmii_rx_clk         ),      
.i_gmii_rx_dv                   (i_gmii_rx_dv          ),
.iv_gmii_rxd                    (iv_gmii_rxd           ),
.i_gmii_rx_er                   (i_gmii_rx_er          ),
.o_gmii_tx_clk                  (o_gmii_tx_clk         ),
.o_gmii_tx_en                   (o_gmii_tx_en          ),
.ov_gmii_txd                    (ov_gmii_txd           ),
.o_gmii_tx_er                   (o_gmii_tx_er          ),
                                                                                              
.i_data_wr                      (w_data_wr_css2ta   ),                              
.iv_data                        (wv_data_css2ta     ),                                                                              
.ov_data                        (wv_data_lmp2css    ),                         
.o_data_wr                      (w_data_wr_lmp2css  ),  
                                                    
.ov_local_id                    (ov_local_id        ),
.iv_tss_ver                     (iv_tss_ver         ),
.o_rc_rxenable                  (o_rc_rxenable      ),
.o_st_rxenable                  (o_st_rxenable      ),
//.o_tsn_or_tte                   (o_tsn_or_tte),

.iv_master_port                 (wv_master_port_tsc2lmp     ),
.iv_port_ptp_enabled            (wv_port_ptp_enabled_tsc2lmp),

.o_wr_tsc                       (w_wr_lmp2osc        ),
.ov_wdata_tsc                   (wv_wdata_lmp2osc    ),
.ov_addr_tsc                    (wv_addr_lmp2osc     ),
.o_rd_tsc                       (w_rd_lmp2osc        ),
.i_wr_tsc                       (w_wr_tsc2ta        ),
.iv_raddr_tsc                   (wv_raddr_tsc2ta    ),
.iv_rdata_tsc                   (wv_rdata_tsc2ta    ),

.o_wr_cc                        (w_wr_lmp2cc         ),
.ov_wdata_cc                    (wv_wdata_lmp2cc     ),
.ov_addr_cc                     (wv_addr_lmp2cc      ),
.o_rd_cc                        (w_rd_lmp2cc         ),
.i_wr_cc                        (w_wr_cc2ta         ),
.iv_raddr_cc                    (wv_raddr_cc2ta     ),
.iv_rdata_cc                    (wv_rdata_cc2ta     ),

.o_wr_ton                       (w_wr_lmp2ton     ),
.ov_wdata_ton                   (wv_wdata_lmp2ton ),
.ov_addr_ton                    (wv_addr_lmp2ton  ),
.o_rd_ton                       (w_rd_lmp2ton     ),
.i_wr_ton                       (w_wr_ton2ta     ),
.iv_raddr_ton                   (wv_raddr_ton2ta ),
.iv_rdata_ton                   (wv_rdata_ton2ta ),
                                           
.ov_hcp_ext_command             (wv_command_hcp2hub        ),      
.o_hcp_ext_command_wr           (w_command_wr_hcp2hub      ),    
.iv_hcp_ext_command_ack         (wv_command_ack_hub2hcp    ),  
.i_hcp_ext_command_ack_wr       (w_command_ack_wr_hub2hcp  ),

.i_tsmp_lookup_table_key_wr     (i_tsmp_lookup_table_key_wr       ),
.iv_tsmp_lookup_table_key       (iv_tsmp_lookup_table_key         ),
.ov_tsmp_lookup_table_outport   (ov_tsmp_lookup_table_outport     ),
.o_tsmp_lookup_table_outport_wr (o_tsmp_lookup_table_outport_wr   )	
);

time_offset_notify	
#(
.clk_period(clk_period)
)
time_offset_notify_inst
(
.i_clk   			   ( i_clk   		        ),
.i_rst_n               ( i_rst_n                ),

.iv_localclk            ( ov_localclk             ),
.iv_hcp_mac            ( {24'h662662, ov_local_id, 12'h0}),
.i_cycle_start         ( o_cyclestart          ),

.iv_addr               (wv_addr_lmp2ton        ),       
.iv_wdata              (wv_wdata_lmp2ton    ),       
.i_wr                  (w_wr_lmp2ton     ),  
.i_rd                  (w_rd_lmp2ton        ),        
.o_wr                  (w_wr_ton2ta        ),        
.ov_addr               (wv_raddr_ton2ta    ),    
.ov_rdata              (wv_rdata_ton2ta    ),    

.ov_data               (wv_data_ton2tcss   ),
.o_data_wr             (w_data_wr_ton2tcss )
);

time_sync_computing 
#(
.local_module_id(12'd0),
.PTP_RX_OFFSET_XGMII(PTP_RX_OFFSET_XGMII),
.PTP_TX_OFFSET_XGMII(PTP_TX_OFFSET_XGMII),
.PTP_RX_OFFSET_GMII(PTP_RX_OFFSET_GMII),
.PTP_TX_OFFSET_GMII(PTP_TX_OFFSET_GMII),
.clk_period     (clk_period)
)
time_sync_computing_inst
(
        .i_clk                     (i_clk  ),
        .i_rst_n                   (i_rst_n),
     
        .i_wr                      (w_wr_lmp2osc      ),      
        .iv_wdata                  (wv_wdata_lmp2osc  ),      
        .iv_addr                   (wv_addr_lmp2osc   ),      
        .i_rd                      (w_rd_lmp2osc      ),           
        .o_wr                      (w_wr_tsc2ta       ),       
        .ov_rdata                  (wv_rdata_tsc2ta   ),        
        .ov_raddr                  (wv_raddr_tsc2ta   ), 

        .i_tsnnic_or_tsnswitch     (i_tsnnic_or_tsnswitch     ),//1:tsnnic.  0:tsnswitch        
                                
        .ov_localclk               (ov_localclk       ),
		//.o_local_cnt_rst           (o_local_cnt_rst   ),
		.iv_hcp_mid                (ov_local_id       ),
		.ov_master_port            (wv_master_port_tsc2lmp        ),
		.o_sync_ok                 (o_sync_ok                     ),
		.o_sync_ok_wr              (                              ),
        .ov_port_ptp_enabled       (wv_port_ptp_enabled_tsc2lmp   ),
        .o_sync_step_mode          (o_sync_step_mode  ),
        //.i_cyclestart              (o_cyclestart      ),
		.ov_local_count            (ov_local_counter),
	 
		.iv_data                   (wv_data_css2osc       ),
		.i_data_wr                 (w_data_wr_css2osc     ), 
		.ov_data                   (wv_data_tsc2css       ), 
		.o_data_wr                 (w_data_wr_tsc2css 	  ), 
        
        .ov_data_report            (wv_data_rep_tsc2css   ),
        .o_data_wr_report          (w_data_wr_rep_tsc2css ),
		               
		.i_osm_req_tx_pulse_p0     (i_osm_req_tx_pulse_p0   ),     
		.i_osm_resp_rx_pulse_p0    (i_osm_resp_rx_pulse_p0  ),     
		.i_osm_req_tx_pulse_p1     (i_osm_req_tx_pulse_p1   ),     
		.i_osm_resp_rx_pulse_p1    (i_osm_resp_rx_pulse_p1  ),     
		.i_osm_req_tx_pulse_p2     (i_osm_req_tx_pulse_p2   ),     
		.i_osm_resp_rx_pulse_p2    (i_osm_resp_rx_pulse_p2  ),     
		.i_osm_req_tx_pulse_p3     (i_osm_req_tx_pulse_p3   ),     
		.i_osm_resp_rx_pulse_p3    (i_osm_resp_rx_pulse_p3  ),     
		.i_osm_req_tx_pulse_p4     (i_osm_req_tx_pulse_p4   ),     
		.i_osm_resp_rx_pulse_p4    (i_osm_resp_rx_pulse_p4  ),     
		.i_osm_req_tx_pulse_p5     (i_osm_req_tx_pulse_p5   ),     
		.i_osm_resp_rx_pulse_p5    (i_osm_resp_rx_pulse_p5  ),     
		.i_osm_req_tx_pulse_p6     (i_osm_req_tx_pulse_p6   ),     
		.i_osm_resp_rx_pulse_p6    (i_osm_resp_rx_pulse_p6  ),     
		.i_osm_req_tx_pulse_p7     (i_osm_req_tx_pulse_p7   ),     
		.i_osm_resp_rx_pulse_p7    (i_osm_resp_rx_pulse_p7  ),     
		.i_osm_req_tx_pulse_p8     (i_osm_req_tx_pulse_p8   ),     
		.i_osm_resp_rx_pulse_p8    (i_osm_resp_rx_pulse_p8  ),     
		.i_osm_req_tx_pulse_p9     (i_osm_req_tx_pulse_p9   ),     
		.i_osm_resp_rx_pulse_p9    (i_osm_resp_rx_pulse_p9  ),     
		.i_osm_req_tx_pulse_p10    (i_osm_req_tx_pulse_p10  ),     
		.i_osm_resp_rx_pulse_p10   (i_osm_resp_rx_pulse_p10 ),     
		.i_osm_req_tx_pulse_p11    (i_osm_req_tx_pulse_p11  ),     
		.i_osm_resp_rx_pulse_p11   (i_osm_resp_rx_pulse_p11 ),     
		.i_osm_req_tx_pulse_p12    (i_osm_req_tx_pulse_p12  ),     
		.i_osm_resp_rx_pulse_p12   (i_osm_resp_rx_pulse_p12 ),     
		.i_osm_req_tx_pulse_p13    (i_osm_req_tx_pulse_p13  ),     
		.i_osm_resp_rx_pulse_p13   (i_osm_resp_rx_pulse_p13 ),     
		.i_osm_req_tx_pulse_p14    (i_osm_req_tx_pulse_p14  ),     
		.i_osm_resp_rx_pulse_p14   (i_osm_resp_rx_pulse_p14 ),     
		.i_osm_req_tx_pulse_p15    (i_osm_req_tx_pulse_p15  ),     
		.i_osm_resp_rx_pulse_p15   (i_osm_resp_rx_pulse_p15 ),     
		.i_osm_req_tx_pulse_p16    (i_osm_req_tx_pulse_p16  ),     
		.i_osm_resp_rx_pulse_p16   (i_osm_resp_rx_pulse_p16 ),     
		.i_osm_req_tx_pulse_p17    (i_osm_req_tx_pulse_p17  ),     
		.i_osm_resp_rx_pulse_p17   (i_osm_resp_rx_pulse_p17 ),     
		.i_osm_req_tx_pulse_p18    (i_osm_req_tx_pulse_p18  ),     
		.i_osm_resp_rx_pulse_p18   (i_osm_resp_rx_pulse_p18 ),     
		.i_osm_req_tx_pulse_p19    (i_osm_req_tx_pulse_p19  ),     
		.i_osm_resp_rx_pulse_p19   (i_osm_resp_rx_pulse_p19 ),     
		.i_osm_req_tx_pulse_p20    (i_osm_req_tx_pulse_p20  ),     
		.i_osm_resp_rx_pulse_p20   (i_osm_resp_rx_pulse_p20 ),     
		.i_osm_req_tx_pulse_p21    (i_osm_req_tx_pulse_p21  ),     
		.i_osm_resp_rx_pulse_p21   (i_osm_resp_rx_pulse_p21 ),     
		.i_osm_req_tx_pulse_p22    (i_osm_req_tx_pulse_p22  ),     
		.i_osm_resp_rx_pulse_p22   (i_osm_resp_rx_pulse_p22 ),     
		.i_osm_req_tx_pulse_p23    (i_osm_req_tx_pulse_p23  ),     
		.i_osm_resp_rx_pulse_p23   (i_osm_resp_rx_pulse_p23 ),     
		.i_osm_req_tx_pulse_p24    (i_osm_req_tx_pulse_p24  ),     
		.i_osm_resp_rx_pulse_p24   (i_osm_resp_rx_pulse_p24 ),     
		.i_osm_req_tx_pulse_p25    (i_osm_req_tx_pulse_p25  ),     
		.i_osm_resp_rx_pulse_p25   (i_osm_resp_rx_pulse_p25 ),     
		.i_osm_req_tx_pulse_p26    (i_osm_req_tx_pulse_p26  ),     
		.i_osm_resp_rx_pulse_p26   (i_osm_resp_rx_pulse_p26 ),     
		.i_osm_req_tx_pulse_p27    (i_osm_req_tx_pulse_p27  ),     
		.i_osm_resp_rx_pulse_p27   (i_osm_resp_rx_pulse_p27 ),     
		.i_osm_req_tx_pulse_p28    (i_osm_req_tx_pulse_p28  ),     
		.i_osm_resp_rx_pulse_p28   (i_osm_resp_rx_pulse_p28 ),     
		.i_osm_req_tx_pulse_p29    (i_osm_req_tx_pulse_p29  ),     
		.i_osm_resp_rx_pulse_p29   (i_osm_resp_rx_pulse_p29 ),     
		.i_osm_req_tx_pulse_p30    (i_osm_req_tx_pulse_p30  ),     
		.i_osm_resp_rx_pulse_p30   (i_osm_resp_rx_pulse_p30 ),     
		.i_osm_req_tx_pulse_p31    (i_osm_req_tx_pulse_p31  ),     
		.i_osm_resp_rx_pulse_p31   (i_osm_resp_rx_pulse_p31 ), 
         
        .i_osm_req_rx_pulse_p0     (i_osm_req_rx_pulse_p0   ),
		.i_osm_resp_tx_pulse_p0    (i_osm_resp_tx_pulse_p0  ),
		.i_osm_req_rx_pulse_p1     (i_osm_req_rx_pulse_p1   ),
		.i_osm_resp_tx_pulse_p1    (i_osm_resp_tx_pulse_p1  ),
		.i_osm_req_rx_pulse_p2     (i_osm_req_rx_pulse_p2   ),
		.i_osm_resp_tx_pulse_p2    (i_osm_resp_tx_pulse_p2  ),
		.i_osm_req_rx_pulse_p3     (i_osm_req_rx_pulse_p3   ),
		.i_osm_resp_tx_pulse_p3    (i_osm_resp_tx_pulse_p3  ),
		.i_osm_req_rx_pulse_p4     (i_osm_req_rx_pulse_p4   ),
		.i_osm_resp_tx_pulse_p4    (i_osm_resp_tx_pulse_p4  ),
		.i_osm_req_rx_pulse_p5     (i_osm_req_rx_pulse_p5   ),
		.i_osm_resp_tx_pulse_p5    (i_osm_resp_tx_pulse_p5  ),
		.i_osm_req_rx_pulse_p6     (i_osm_req_rx_pulse_p6   ),
		.i_osm_resp_tx_pulse_p6    (i_osm_resp_tx_pulse_p6  ),
		.i_osm_req_rx_pulse_p7     (i_osm_req_rx_pulse_p7   ),
		.i_osm_resp_tx_pulse_p7    (i_osm_resp_tx_pulse_p7  ),
		.i_osm_req_rx_pulse_p8     (i_osm_req_rx_pulse_p8   ),
		.i_osm_resp_tx_pulse_p8    (i_osm_resp_tx_pulse_p8  ),
		.i_osm_req_rx_pulse_p9     (i_osm_req_rx_pulse_p9   ),
		.i_osm_resp_tx_pulse_p9    (i_osm_resp_tx_pulse_p9  ),
		.i_osm_req_rx_pulse_p10    (i_osm_req_rx_pulse_p10  ),
		.i_osm_resp_tx_pulse_p10   (i_osm_resp_tx_pulse_p10 ),
		.i_osm_req_rx_pulse_p11    (i_osm_req_rx_pulse_p11  ),
		.i_osm_resp_tx_pulse_p11   (i_osm_resp_tx_pulse_p11 ),
		.i_osm_req_rx_pulse_p12    (i_osm_req_rx_pulse_p12  ),
		.i_osm_resp_tx_pulse_p12   (i_osm_resp_tx_pulse_p12 ),
		.i_osm_req_rx_pulse_p13    (i_osm_req_rx_pulse_p13  ),
		.i_osm_resp_tx_pulse_p13   (i_osm_resp_tx_pulse_p13 ),
		.i_osm_req_rx_pulse_p14    (i_osm_req_rx_pulse_p14  ),
		.i_osm_resp_tx_pulse_p14   (i_osm_resp_tx_pulse_p14 ),
		.i_osm_req_rx_pulse_p15    (i_osm_req_rx_pulse_p15  ),
		.i_osm_resp_tx_pulse_p15   (i_osm_resp_tx_pulse_p15 ),
		.i_osm_req_rx_pulse_p16    (i_osm_req_rx_pulse_p16  ),
		.i_osm_resp_tx_pulse_p16   (i_osm_resp_tx_pulse_p16 ),
		.i_osm_req_rx_pulse_p17    (i_osm_req_rx_pulse_p17  ),
		.i_osm_resp_tx_pulse_p17   (i_osm_resp_tx_pulse_p17 ),
		.i_osm_req_rx_pulse_p18    (i_osm_req_rx_pulse_p18  ),
		.i_osm_resp_tx_pulse_p18   (i_osm_resp_tx_pulse_p18 ),
		.i_osm_req_rx_pulse_p19    (i_osm_req_rx_pulse_p19  ),
		.i_osm_resp_tx_pulse_p19   (i_osm_resp_tx_pulse_p19 ),
		.i_osm_req_rx_pulse_p20    (i_osm_req_rx_pulse_p20  ),
		.i_osm_resp_tx_pulse_p20   (i_osm_resp_tx_pulse_p20 ),
		.i_osm_req_rx_pulse_p21    (i_osm_req_rx_pulse_p21  ),
		.i_osm_resp_tx_pulse_p21   (i_osm_resp_tx_pulse_p21 ),
		.i_osm_req_rx_pulse_p22    (i_osm_req_rx_pulse_p22  ),
		.i_osm_resp_tx_pulse_p22   (i_osm_resp_tx_pulse_p22 ),
		.i_osm_req_rx_pulse_p23    (i_osm_req_rx_pulse_p23  ),
		.i_osm_resp_tx_pulse_p23   (i_osm_resp_tx_pulse_p23 ),
		.i_osm_req_rx_pulse_p24    (i_osm_req_rx_pulse_p24  ),
		.i_osm_resp_tx_pulse_p24   (i_osm_resp_tx_pulse_p24 ),
		.i_osm_req_rx_pulse_p25    (i_osm_req_rx_pulse_p25  ),
		.i_osm_resp_tx_pulse_p25   (i_osm_resp_tx_pulse_p25 ),
		.i_osm_req_rx_pulse_p26    (i_osm_req_rx_pulse_p26  ),
		.i_osm_resp_tx_pulse_p26   (i_osm_resp_tx_pulse_p26 ),
		.i_osm_req_rx_pulse_p27    (i_osm_req_rx_pulse_p27  ),
		.i_osm_resp_tx_pulse_p27   (i_osm_resp_tx_pulse_p27 ),
		.i_osm_req_rx_pulse_p28    (i_osm_req_rx_pulse_p28  ),
		.i_osm_resp_tx_pulse_p28   (i_osm_resp_tx_pulse_p28 ),
		.i_osm_req_rx_pulse_p29    (i_osm_req_rx_pulse_p29  ),
		.i_osm_resp_tx_pulse_p29   (i_osm_resp_tx_pulse_p29 ),
		.i_osm_req_rx_pulse_p30    (i_osm_req_rx_pulse_p30  ),
		.i_osm_resp_tx_pulse_p30   (i_osm_resp_tx_pulse_p30 ),
		.i_osm_req_rx_pulse_p31    (i_osm_req_rx_pulse_p31  ),
		.i_osm_resp_tx_pulse_p31   (i_osm_resp_tx_pulse_p31 ),
        
        .o_sync_generate_pulse     (o_sync_generate_pulse)
);

cyclestart_control cyclestart_control_inst
(
.i_clk                   (i_clk              ),
.i_rst_n                 (i_rst_n            ),

.i_wr                 (w_wr_lmp2cc         ),
.iv_wdata             (wv_wdata_lmp2cc     ),
.iv_addr              (wv_addr_lmp2cc      ),
.i_rd                 (w_rd_lmp2cc         ),
.o_wr                 (w_wr_cc2ta         ),
.ov_rdata             (wv_rdata_cc2ta     ),
.ov_raddr             (wv_raddr_cc2ta     ),

.iv_localclk              (ov_localclk         ),
.i_syn_ok                (o_sync_ok     ),
.i_tsn_or_tte            (1'b1),//(o_tsn_or_tte       ),

.ov_cycle_length         (ov_cycle_length),
.o_cyclestart            (o_cyclestart      )
);

mbus_hub mbus_hub_inst
(
        .i_clk                        (i_clk                     ),
        .i_rst_n                      (i_rst_n                   ),
                                                                 
        .iv_command                   (wv_command_hcp2hub        ),
	    .i_command_wr                 (w_command_wr_hcp2hub      ),
        .ov_command_ack               (wv_command_ack_hub2hcp    ),
        .o_command_ack_wr             (w_command_ack_wr_hub2hcp  ), 
                                                                 
        .iv_command_ack_tse           (iv_command_ack_tss         ),
	    .i_command_ack_wr_tse         (i_command_ack_wr_tss       ),
        .ov_command_tse               (ov_command_tss             ),
        .o_command_wr_tse             (o_command_wr_tss           )    
);
//***************************************************
//      add valid of data and delay 8 cycles
//***************************************************
reg        [134:0]      rv_data;
always @(posedge i_clk or negedge i_rst_n) begin
    if(!i_rst_n) begin
        rv_data         <= 135'b0;
    end
    else begin
        if(i_data_wr_from_tss)begin
            rv_data     <= {rv_data[125:0],iv_data_from_tss};
        end
        else begin
            rv_data     <= {rv_data[125:0],9'b0};
        end        
    end
end
//***************************************************
//       receive pit record in ctrl interface
//***************************************************
(*MARK_DEBUG="true"*)reg         [7:0]      rv_response_cnt;
(*MARK_DEBUG="true"*)reg         [7:0]      rv_response_follow_up_cnt;

reg       [2:0]               rv_osp_state;
localparam      IDLE_S            = 3'd0,
                TRANS_MRQ_S       = 3'd1,
                TRANS_MRS_S       = 3'd2,
                TRANS_SNP_S       = 3'd3,
                TRANS_SIP_S       = 3'd4,
                TRANS_ANP_S       = 3'd5,
                DISCARD_PKT_S     = 3'd6;
always @(posedge i_clk or negedge i_rst_n) begin
    if(!i_rst_n)begin
        rv_response_cnt           <= 8'b0;
        rv_response_follow_up_cnt <= 8'b0;        
        
        rv_osp_state   <= IDLE_S;        
    end
    else begin
        case(rv_osp_state)
            IDLE_S:begin
			    if(rv_data[134])begin//transmit first cycle.
					if(({rv_data[25:18],rv_data[16:9]} == 16'hff01) && (rv_data[7:0] == 8'h06) && ((iv_data_from_tss[7:0] == 8'h03)||(iv_data_from_tss[7:0] == 8'h04)))begin//pdelay_resp,pdelay_resp_follow_up.                      
						rv_osp_state   <= TRANS_MRQ_S;
						
                        if(iv_data_from_tss[7:0] == 8'h03)begin
                            rv_response_cnt           <= rv_response_cnt + 1'b1;
                        end
                        else begin
                            rv_response_cnt           <= rv_response_cnt;
                        end	
                        
                        if(iv_data_from_tss[7:0] == 8'h04)begin
                            rv_response_follow_up_cnt           <= rv_response_follow_up_cnt + 1'b1;
                        end
                        else begin
                            rv_response_follow_up_cnt           <= rv_response_follow_up_cnt;
                        end                         					  
					end                 
					else begin//discard pkt				
						rv_osp_state        <= TRANS_MRQ_S;  
					end                    
                end
                else begin	                
                    rv_osp_state        <= IDLE_S;                      
                end
            end
            TRANS_MRQ_S:begin          
                if(rv_data[134])begin//last cycle. 
                    rv_osp_state   <= IDLE_S;
                end
                else begin
                    rv_osp_state   <= TRANS_MRQ_S;
                end
            end            
            default:begin
                rv_osp_state <= IDLE_S;  
            end
        endcase
    end
end
endmodule 
